MECHATRONICScoretheory

DIGITAL DESIGN AND VERILOG PROGRAMMING

MTE 2122

Syllabus

01Logic Families
02Review of logic minimization techniques
03Weighted and unweighted codes
04Binary Adder/ Subtractor
05BCD Adder
06code converters
07Binary comparators
08Parity generator/ checker
09Combinational circuit design using logic blocks: multiplexers, demultiplexers, encoders, priority encoder, decoder
10Shannon's decomposition
11Sequential Logic Design: Latches, Flip-flops: Design of synchronous and asynchronous counters, Shift registers
12Synchronous Sequential machines: classification, finite state machine (FSM), analysis and design
13Introduction to Verilog HDL: VHDL versus Verilog, Structural modeling, Data-flow Modeling, Behavioral Modeling, Switch Level Modeling, Tasks and Functions, Test Bench
14Digital Implementation Options and FPGA Architectures: Full-custom and semi-custom, PLD, ASICs: CPLDs, MPGAs and FPGAs, Architecture of ACTEL and XILINX logic family

Zvi Kohavi, Niraj K Jha, Switching and Finite Automata Theory, (3e), Cambridge, 2010
Morris Mano, Digital design, (3e), Prentice Hall of India, 2002
Floyd and Jain, Digital Fundamentals, (11e), Pearson Education, 2015
A. Anand Kumar, Switching Theory and Logic Design, (2e), Prentice Hall of India, 2009
Bhasker. J, A Verilog HDL Primer, (3e), Star Galaxy, 2016
Stephen. Brown and Zvonko Vranesic, Fundamentals of Digital Logic with Verilog Design, (3e), Tata McGraw Hill, 2014
M. J. S. Smith, Application Specific ICs, Pearson Education, 2004

Credits Structure

2Lecture

1Tutorial

0Practical

3Total